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#1 2014-11-07 16:46:45

techknight
Member
Registered: 2014-05-22
Posts: 453

68020/68030 accelerator project

I figured I would start this project here, because I ran my last project over at 68k.

Does anyone have access to Motorola's application notes books from the 80s/90s?

Looking for a specific application note that talks about interfacing a 68020 to a 16bit system such as the Macintosh portable.

I found alot of nice resources from the amiga and atari land. But they all deal with a 7mhz clock or thereabouts and using logic to keep that in sync with the accelerated clock of the new cpu for E/VPA/VMA purposes.

Well the portable runs a 16mhz natively.  But information is scarce and unclear on how to deal with that on existing accelerator ideas and designs for 7mhz.

In just about all cases that I can see is they use a separate async clock to run the processor,  and somewhere up the line they do some logic to allow the 7mhz base clock to sync up for correct DSACK on the synchronous bus.

On all cases though, they are removing the 68000
My case, its staying. So in theory I can let the 68000 hand all synchronous operations and just use the 020 in bus mastering for asynchronous ops.

Any thoughts and ideas? Btw I found an amiga accelerator schematics called LUCAS. has the CUPL code for the PALs but I dont understand cupl, plus its designed to again... deal with 7mhz and E sync.

Any thoughts?

Last edited by techknight (2014-11-07 16:52:45)

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#2 2014-11-07 16:52:02

bbraun
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Registered: 2014-05-29
Posts: 1,064
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Re: 68020/68030 accelerator project

I don't have any of the docs you're looking for, unfortunately.
Nice work on the RAM card, I was checking in periodically.  That PCB routing looks sweet!
For the accelerator card, would you be thinking of keeping the same clock speed and putting an 020 or 030 on it?  Are there still sources for those?

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#3 2014-11-07 16:55:06

techknight
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Registered: 2014-05-22
Posts: 453

Re: 68020/68030 accelerator project

Thanks! I am fairly good at what I do, when I can do it.

Sources are scarce. Mostly ebay. My case ill remove them from junk boards. 030 is going to be more plentiful so I may go with that.

Im sure there are 68020 and 68882 softcores for an FPGA but I dont know FPGAs.

Last edited by techknight (2014-11-07 16:56:58)

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#4 2014-11-07 17:11:10

bbraun
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Registered: 2014-05-29
Posts: 1,064
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Re: 68020/68030 accelerator project

Yeah, the 030 has better cache and memory access, so probably a better speed boost than the 020.  Softcores in FPGA would be interesting, but yeah.  Lots of learning curve on that.

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#5 2014-11-07 22:51:10

Eudimorphodon
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Registered: 2014-09-02
Posts: 525

Re: 68020/68030 accelerator project

techknight wrote:

My case, its staying. So in theory I can let the 68000 hand all synchronous operations and just use the 020 in bus mastering for asynchronous ops.

Could you explain a little more what you mean by this? Short of revamping the MacOS so it supports some flavor of asymmetric multiprocessing I have no idea how you intend to let the 68000 handle *anything* while the 68020 is in charge. Most 68020/'030 accellerators for Pluses and SE's don't remove the 68000 (because it's soldered), they "put it to sleep" and it stays asleep doing absolutely nothing. (The boards that include control panels for disabling/enabling the accellerator basically just control a little soft switch that controls whether or not the accellerator leaps into action and smothers the 68000 or not at boot time. I've never heard of one that lets you "hot-switch" between the two CPUs, let alone run them simultaneously. Obviously I'm not including boards like Radius Rockets with are basically complete computers when I say this.)

I saw the article for the LUCAS (and I see now that the motorola document has turned up on the other site), and it looks like it's almost a straight-up implementation of Motorola's design, other than Motorola's design doesn't try to do any clock-doubling. Looking at the benchmarks for the Motorola design sort of makes one question whether doing this is worth the effort at all *unless* you run the new CPU faster than the built-in one. (Which would pretty much necessitate going to using 68030s, since 68020s faster than 20 mhz or so are sort of rare.) Best case you might get 2x performance, but there are some tests it was actually slower at. It also looks like Motorola comes right out and says their adapter design is sloppy and they recommend using a CPU rated at 16Mhz for a 10Mhz bus because of timing constraints imposed by the PAL logic; unless you can do better with your CPLDs you might get unreliable performance at 16mhz even with rare 20mhz 68020 CPUs...

Of course, I'm not saying this to discourage anyone, just noting that I suspect in order to make a "production quality" accellerator you'll have to put quite a lot more design work into it than what's in the the application note. (Which is really meant only for bench testing/educational purposes.)


Flap Different.

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#6 2014-11-07 23:22:25

techknight
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Registered: 2014-05-22
Posts: 453

Re: 68020/68030 accelerator project

So, I shouldn't do it? All I wanted the 68000 for was e clock. But thier app note takes care of that. The CPLDs are good at 5 to 7ns.

Only reason why I wanted the 020/030 is to run software that requires it. Like word 6. Just because. ..

I did find a site that open sourced an FPGA version. Its clocked at 100mhz...

Last edited by techknight (2014-11-07 23:24:19)

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#7 2014-11-07 23:45:53

jt
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From: Bermuda Triangle, NC USA
Registered: 2014-05-21
Posts: 1,470

Re: 68020/68030 accelerator project

Cool stuff! I took a run at doing something along these lines with off the shelf components:

https://68kmla.org/forums/index.php?/to … ntry204889

Now I'm definitely going to have to do a close read of your RAM Card thread, techknight. I just ran across something curious about the addressing of the Luggable's Memory Slot in my old, going nowhere fast thread.

HRMMM??????

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#8 2014-11-08 00:00:00

Eudimorphodon
Member
Registered: 2014-09-02
Posts: 525

Re: 68020/68030 accelerator project

techknight wrote:

So, I shouldn't do it? All I wanted the 68000 for was e clock. But thier app note takes care of that. The CPLDs are good at 5 to 7ns.

Not saying don't do it; just speculating it's not going to blow people to the back of the auditorium strictly as an "accellerator" unless you clock-double it. Don't mind me. I would check to see if the software you want to run actually will run without, say, Color Quickdraw. That's something a real 68020+ Mac has that you're not going to in an acellerated machine. (If said software will go on an SE or Plus with an acellerator by all means have at it.)


Flap Different.

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#9 2014-11-08 01:02:27

techknight
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Registered: 2014-05-22
Posts: 453

Re: 68020/68030 accelerator project

Plus dont forget having an accelerated portable is just "cool". Whether its useful or not is debatable. I could clock double it to 33Mhz. Everything is asynchronous so it should not be an issue. Following the guide, keeping the E in sync with the main 16Mhz, everything will be ok.

To make it even stranger, it seems E isnt even connected on the portable to anything but the PDS slot. VMA/VPA is going to GLU only.

That tells me the GLU IC in the portable is generating the E clock, which also tells me maybe the GLU was originally designed FOR an 030, but they stuck a 68HC000 in there instead of power reasons.

Last edited by techknight (2014-11-08 01:07:00)

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#10 2014-11-08 02:28:42

jt
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From: Bermuda Triangle, NC USA
Registered: 2014-05-21
Posts: 1,470

Re: 68020/68030 accelerator project

tangential dreaming:

I wonder if Dragonball VZ might be available in any significant quantity?

Spec sheet looks interesting: http://www.freescale.com/files/32bit/do … VZ328P.pdf

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#11 2014-11-08 04:20:28

Mk.558
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Registered: 2014-07-08
Posts: 168

Re: 68020/68030 accelerator project

The coolest accelerator I've seen yet are those PowerUP class of Amiga accelerators. How can you go wrong with a fast 240MHz 603e and a 68060 at 50MHz with some slick memory upgrades to boot?


SE/30 Cap Replacement http://tinyurl.com/mjf24zs
Classic Mac Networking v3.1 http://applefool.com/se30/
"Linux assumes you know exactly what you are doing." -oboedad55, ubuntuforums.org

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#12 2014-11-08 13:54:40

techknight
Member
Registered: 2014-05-22
Posts: 453

Re: 68020/68030 accelerator project

jt wrote:

tangential dreaming:

I wonder if Dragonball VZ might be available in any significant quantity?

Spec sheet looks interesting: http://www.freescale.com/files/32bit/do … VZ328P.pdf

That wont work. it is a Microcontroller, not a microprocessor. it has a bunch of peripherals connected internally, occupying address space which I am certain would conflict with the macintosh address bus.

Not to mention, the FC pins arnt brought out. they left the interrupt controller internal.

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#13 2014-11-08 15:29:44

jt
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From: Bermuda Triangle, NC USA
Registered: 2014-05-21
Posts: 1,470

Re: 68020/68030 accelerator project

I didn't look at the diagram for interfacing it directly to the full 68000 bus. I failed to mention that I was actually thinking more along the lines of the Radius Rocket model for the PDS slot.

The interchange about the standard method of poleaxing the Luggable's proc/running straight from the accelerator made me think of RocketShare's AppleTalk over NuBus. Leave the Luggable booting from its own I/O, managing full screen mode for the DragonBall's 33MHz synthesized 68000 for straight Mac applications.  The DragonBall can be dumbed down to a 68000 Rocket a/o run MiniVMac under Linux after booting into a full-on Linux install, having a modern OS running on the Luggable, even with WiFi should be doable.

Perchance to dream  .  .  .


edit: The DragonBall's 640x480 piped out of the Video Connector in color for an LCD would be the ultimate Luggable dream.

.

Last edited by jt (2014-11-08 15:39:58)

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#14 2014-11-08 15:41:27

techknight
Member
Registered: 2014-05-22
Posts: 453

Re: 68020/68030 accelerator project

id rather leave the mac logicboard itself as the computer, running the programs. Just offload it to an accelerated processor. I dont feel right having the entire computer in the PDS slot, and using the motherboard only as I/O.

Anyway, plus the PDS on a portable has a VERY limited space for PCB area. So, I am sorta stuck on how I do this.

the more i look into this project, the more I am starting to realize I may need an FPGA for this thing. fitting a 68882, and a 68020/030 plus all the buffers and glu logic will be almost impossible within the same footprint as the RAM card I made.

So if i stick it all in an FPGA, itll be small footprint. All i would need is the voltage regulator, FPGA, and the I/O level shifting buffers.

Good thing is, 020 FPGA accelerator code has already been done. But it isnt open source yet that I can see, but what IS open source is a super fast 68000 softcore accelerator.

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#15 2014-11-08 15:57:24

jt
Member
From: Bermuda Triangle, NC USA
Registered: 2014-05-21
Posts: 1,470

Re: 68020/68030 accelerator project

Cool. I tend to take things way over the top, but I also like "traditional" approaches. wink

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